1. Field of the Invention
The present invention relates to a method and circuit for tunnel-effect programing of floating-gate MOSFET transistors, and is especially advantageous for programing nonvolatile EEPROM and flash-EEPROM memories.
2. Discussion of the Related Art
Nonvolatile semiconductor memories, in particular electrically erasable programmable types, have assumed great importance by virtue of being able to store and preserve information for prolonged periods (decades, under normal operating conditions) even in the absence of a power supply, thus providing a solution to all those applications in which information must be preserved when the equipment or device to which the memories are connected is turned off.
Nonvolatile memories may be digital or analog (the latter of more recent and less widespread application), and generally comprise numerous elementary cells for storing an elementary item (a bit in the case of digital memories, a specific electric level in the case of analog types). Regardless, however, of the type of fabrication technology employed, the information stored in any commercial memory cell is represented by a given charge (e.g., excess electrons) inside the cell, and more specifically in a region (e.g., a floating gate) insulated electrically from the rest of the cell.
In digital applications, the stored charge assumes two values corresponding respectively to storage of a logic "0" or "1"; whereas, in the case of analog memories, the charge varies within certain limits, and is correlated to the electric level of the signals to be stored via appropriate read and write circuits.
The main problem in programming nonvolatile memory cells lies in controlling the stored charge.
This is particularly important in the case of analog applications, wherein charge control determines the resolution and accuracy with which the electric signal is stored. Charge control is also important in the case of digital memories for minimizing as far as possible the difference between the charges corresponding to the two logic states (also referred to as the write and erase states of the cell) and so minimizing wear and extending the working life of the cell. Moreover, in the case of flash-EEPROM memories, charge control is essential for minimizing read errors due, for example, to the presence of overerased cells.
As we know, the charge of the memory cells in question is altered by Fowler-Nordheim-effect tunneling of a thin dielectric layer in EEPROM and flash-EEPROM cells. Since tunneling depends exponentially on the electric field involved, and since the programming current is extremely low (a few nA), it is difficult to design a circuit capable of automatically limiting the injected charge on the basis of quantities (voltage or current) set during programming, and so accurately controlling the stored charge.
One proposal for solving this problem is to sample the state of the cell during programming, and to interrupt programming upon the stored charge or a quantity which is a direct function of it, assuming a predetermined value.
For example, it has already been proposed (see U.S. Pat. Nos. 4,357,685 and 4,890,259) to divide the programming cycle into a given number of short partial subcycles during each of which only a small fraction of the charge required for the cell to assume the desired final state is injected. At the end of each partial cycle, the state of the cell is tested to determine whether to continue with further partial cycles, or to terminate programming by virtue of the required charge being achieved. The state of the cell is tested on the basis of various electric quantities related to the charge stored in the floating gate, for example, cell threshold, current flow under given bias conditions, etc.
This solution presents several major drawbacks, mainly due to the discrete nature of the charge state achievable, and also due to the dependence of resolution of the injected charge on the number and duration of the partial cycles. Consequently, accuracy is improved only in conjunction with an increase in the number of cycles and, consequently, in programming time, so that, in practice, a trade-off is inevitable between programming time and accuracy, the results of which are not always satisfactory. As a result, the above known method is limited solely to applications wherein no more than rough control of the stored charge is required.
It is therefore a general goal of the present invention to provide a programming method designed to overcome the drawbacks typically associated with known solutions, and which in particular provides for straightforward, high precision programming of MOSFET transistors.